The voltage-triggered SET mechanism and self-compliance characteristics in intrinsic unipolar SiO_x-based resistive switching memory

Recently, resistive random access memory (RRAM) is attractive as a promising candidate for next generation nonvolatile memory due to its potential scalability beyond 10 nm feature size using a crossbar structure, fast switching speed, low operating power, and good reliability. However, in order to fully optimize RRAM operation, extensive understanding of fundamental mechanism such as programming window and self-compliance is needed. In this paper, we will address the voltage-triggered SET mechanism and self-compliance characteristics in intrinsic unipolar SiO_x-based RRAMs. Adding external resistance is found to dramatically affect the voltage of the RESET process, providing insight into the unique unipolar operation. Resistive switching (RS) parameters for a range of external series resistance values indicate that RESET voltage can be controlled by series resistance; however, SET voltage is independent of series resistance. This suggests that the SET process is due to a voltage-triggered mechanism and that the program window (RESET-SET voltage) can be optimized for program/erase disturbance immunity in circuit-level applications. The SET and RESET transitions were also characterized using a dynamic conductivity method, which distinguishes the self-compliance behavior of SiO_x-based RRAM. By using a conceptual 'filament/GAP' model of the conductive filament and making reasonable assumptions, the internal filament resistance and GAP resistance can be estimated for high-and low-resistance states (HRS and LRS), and are found to be strongly related to external series resistance. Our experimental results not only provide insights into potential reliability issues, but also help clarify the switching mechanisms and device operating characteristics of SiO_x-based RRAM.