Simulation of a 915 MHz receiver using the HP advanced design system

E. Benabe; A. Kuppusamy; T. Weller; Paul G Flikkema; L. Dunleavy

doi:10.1109/ARFTG.1998.327313

Simulation of a 915 MHz receiver using the HP advanced design system

E. Benabe, A. Kuppusamy, T. Weller, Paul G Flikkema, L. Dunleavy

Informatics, Computing, and Cyber Systems, School of

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The simulation of a 915 MHz receiver using Hewlett Packard's Advanced Design System¿ CAE software is presented in this paper. The receiver subsystem includes input filtering and amplification, and a single down-conversion stage to a 70 MHz IF frequency. In order to demonstrate some capabilities of the software, examples of power budget, small-signal sweep, large signal sweep and harmonic balance simulations are described in a tutorial fashion.

Original language	English (US)
Title of host publication	52nd ARFTG Conference Digest-Fall
Subtitle of host publication	Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	28-38
Number of pages	11
ISBN (Electronic)	0780356861, 9780780356863
DOIs	https://doi.org/10.1109/ARFTG.1998.327313
State	Published - 1998
Event	52nd ARFTG Conference Digest-Fall, ARFTG 1998 - Rohnert Park, United States Duration: Dec 3 1998 → Dec 4 1998

Publication series

Name	52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998

Other

Other	52nd ARFTG Conference Digest-Fall, ARFTG 1998
Country/Territory	United States
City	Rohnert Park
Period	12/3/98 → 12/4/98

ASJC Scopus subject areas

Electrical and Electronic Engineering
Computer Networks and Communications
Instrumentation

Access to Document

10.1109/ARFTG.1998.327313

Cite this

Benabe, E., Kuppusamy, A., Weller, T., Flikkema, P. G., & Dunleavy, L. (1998). Simulation of a 915 MHz receiver using the HP advanced design system. In 52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998 (pp. 28-38). (52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ARFTG.1998.327313

Simulation of a 915 MHz receiver using the HP advanced design system. / Benabe, E.; Kuppusamy, A.; Weller, T. et al.
52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998. Institute of Electrical and Electronics Engineers Inc., 1998. p. 28-38 (52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Benabe, E, Kuppusamy, A, Weller, T, Flikkema, PG & Dunleavy, L 1998, Simulation of a 915 MHz receiver using the HP advanced design system. in 52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998. 52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998, Institute of Electrical and Electronics Engineers Inc., pp. 28-38, 52nd ARFTG Conference Digest-Fall, ARFTG 1998, Rohnert Park, United States, 12/3/98. https://doi.org/10.1109/ARFTG.1998.327313

Benabe E, Kuppusamy A, Weller T, Flikkema PG, Dunleavy L. Simulation of a 915 MHz receiver using the HP advanced design system. In 52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998. Institute of Electrical and Electronics Engineers Inc. 1998. p. 28-38. (52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998). doi: 10.1109/ARFTG.1998.327313

Benabe, E. ; Kuppusamy, A. ; Weller, T. et al. / Simulation of a 915 MHz receiver using the HP advanced design system. 52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998. Institute of Electrical and Electronics Engineers Inc., 1998. pp. 28-38 (52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998).

@inproceedings{8193f63116c64d258630657f574e9f61,

title = "Simulation of a 915 MHz receiver using the HP advanced design system",

abstract = "The simulation of a 915 MHz receiver using Hewlett Packard's Advanced Design System¿ CAE software is presented in this paper. The receiver subsystem includes input filtering and amplification, and a single down-conversion stage to a 70 MHz IF frequency. In order to demonstrate some capabilities of the software, examples of power budget, small-signal sweep, large signal sweep and harmonic balance simulations are described in a tutorial fashion.",

author = "E. Benabe and A. Kuppusamy and T. Weller and Flikkema, {Paul G} and L. Dunleavy",

note = "Publisher Copyright: {\textcopyright} 1998 IEEE.; 52nd ARFTG Conference Digest-Fall, ARFTG 1998 ; Conference date: 03-12-1998 Through 04-12-1998",

year = "1998",

doi = "10.1109/ARFTG.1998.327313",

language = "English (US)",

series = "52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "28--38",

booktitle = "52nd ARFTG Conference Digest-Fall",

}

TY - GEN

T1 - Simulation of a 915 MHz receiver using the HP advanced design system

AU - Benabe, E.

AU - Kuppusamy, A.

AU - Weller, T.

AU - Flikkema, Paul G

AU - Dunleavy, L.

PY - 1998

Y1 - 1998

N2 - The simulation of a 915 MHz receiver using Hewlett Packard's Advanced Design System¿ CAE software is presented in this paper. The receiver subsystem includes input filtering and amplification, and a single down-conversion stage to a 70 MHz IF frequency. In order to demonstrate some capabilities of the software, examples of power budget, small-signal sweep, large signal sweep and harmonic balance simulations are described in a tutorial fashion.

AB - The simulation of a 915 MHz receiver using Hewlett Packard's Advanced Design System¿ CAE software is presented in this paper. The receiver subsystem includes input filtering and amplification, and a single down-conversion stage to a 70 MHz IF frequency. In order to demonstrate some capabilities of the software, examples of power budget, small-signal sweep, large signal sweep and harmonic balance simulations are described in a tutorial fashion.

UR - http://www.scopus.com/inward/record.url?scp=85050621216&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85050621216&partnerID=8YFLogxK

U2 - 10.1109/ARFTG.1998.327313

DO - 10.1109/ARFTG.1998.327313

M3 - Conference contribution

AN - SCOPUS:85050621216

T3 - 52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998

SP - 28

EP - 38

BT - 52nd ARFTG Conference Digest-Fall

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 52nd ARFTG Conference Digest-Fall, ARFTG 1998

Y2 - 3 December 1998 through 4 December 1998

ER -

Simulation of a 915 MHz receiver using the HP advanced design system

Abstract

Publication series

Other

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this