TY - GEN
T1 - Real-time image processing on a focal plane SIMD array
AU - Gentile, Antonio
AU - Cruz-Rivera, José L.
AU - Scott Wills, D.
AU - Bustelo, Leugtm
AU - Figueroa, José J.
AU - Fonseca-Camacho, Javier E.
AU - Lugo-Beauchamp, Wilfredo E.
AU - Olivieri, Ricardo
AU - Qui Ñ Ones-Cerpa, Marlyn
AU - Rivera-R Í Os, Alexis H.
AU - Vargas-Gonz Á Les, Iomar
AU - Viera-Vera, Michelle
N1 - Publisher Copyright:
© Springer-Verlag Berlin Heidelberg 1999.
PY - 1999
Y1 - 1999
N2 - Real-time image processing applications have tremendous computational workloads and I/O throughput requirements. Operation in mobile, portable devices poses stringent resource limitations (size, weight, and power). The SIMD Pixel Processor (SIMPil) has been designed at Georgia Tech to address these problems. In SIMPil, an image sensor array (focal plane) is integrated on top of a SIMD computing layer, where processing elements (PEs) are connected in a toms. A prototype processing element has been implemented in 0.8 gm CMOS technology. This paper evaluates the effectiveness of the SIMPil design on a set of important image applications. A target SIMPil system is described, which is capable of operating in the Tops/see range in Gigascale technology. Simulation results indicate sustained operation throughput in the range of 100-1000 Gops/see. These results support the design choices and suggest that more complex, multistage applications can be implemented to execute at real-time frame rates.
AB - Real-time image processing applications have tremendous computational workloads and I/O throughput requirements. Operation in mobile, portable devices poses stringent resource limitations (size, weight, and power). The SIMD Pixel Processor (SIMPil) has been designed at Georgia Tech to address these problems. In SIMPil, an image sensor array (focal plane) is integrated on top of a SIMD computing layer, where processing elements (PEs) are connected in a toms. A prototype processing element has been implemented in 0.8 gm CMOS technology. This paper evaluates the effectiveness of the SIMPil design on a set of important image applications. A target SIMPil system is described, which is capable of operating in the Tops/see range in Gigascale technology. Simulation results indicate sustained operation throughput in the range of 100-1000 Gops/see. These results support the design choices and suggest that more complex, multistage applications can be implemented to execute at real-time frame rates.
UR - http://www.scopus.com/inward/record.url?scp=84893895215&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84893895215&partnerID=8YFLogxK
U2 - 10.1007/BFb0097923
DO - 10.1007/BFb0097923
M3 - Conference contribution
AN - SCOPUS:84893895215
SN - 3540658319
SN - 9783540658313
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 400
EP - 405
BT - Parallel and Distributed Processing - 11 th IPPS/SPDP 1999 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, Proceedings
A2 - Rolim, José
PB - Springer-Verlag
T2 - 13th International Parallel Processing Symposium, IPPS 1999 Held in Conjunction with the 10th Symposium on Parallel and Distributed Processing, SPDP 1999
Y2 - 12 April 1999 through 16 April 1999
ER -