Performance Characterization of Parallel Combination Generators on CPU and GPU Systems

Brian Donnelly, Michael Gowanlock

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Combinatorics is a fundamental aspect of computer science and encompasses many aspects from graph theory to automata. One often overlooked aspect of combinatorics is combination generation which is key to several applications, and critically key to several security protocols. Despite this, there has been an insignificant research dedicated to improving combination generating algorithms since their original introduction roughly 50 years ago. Since their introduction, a number of aspects of computing have changed including the introduction of multi-core CPUs and GPUs. This work examines combination generating algorithms which create combinations for all possible values of n objects taken k at a time. In this paper, we parallelize seven existing combination generation algorithms and optimize one for improved performance on modern parallel architectures. We perform a thorough evaluation of all eight algorithms on a wide range of parameter spaces to gauge their scalability. Combination generators are typically used as a subroutine in a larger application, and so we also examine the performance when combinations are used as input into another routine. We show that the architectural differences between the CPU and GPU influence the performance of the algorithms and include analyses to explain these differences. From our evaluation, we recommend specific combination generators that have the best performance based on architecture and application scenario.

Original languageEnglish (US)
Title of host publicationProceedings - 2025 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2025
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages4-14
Number of pages11
ISBN (Electronic)9798331526436
DOIs
StatePublished - 2025
Event2025 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2025 - Milan, Italy
Duration: Jun 3 2025Jun 7 2025

Publication series

NameProceedings - 2025 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2025

Conference

Conference2025 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2025
Country/TerritoryItaly
CityMilan
Period6/3/256/7/25

Keywords

  • Combination Generation
  • GPU
  • Hashing
  • Parallel Computing
  • Performance Characterization
  • SHA3

ASJC Scopus subject areas

  • Artificial Intelligence
  • Computer Networks and Communications
  • Hardware and Architecture

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