Resistive random access memory (RRAM) using various metal oxides (i.e., SiO2, HfO2, NiO, Al2O3, NbO) have attracted a great deal of attention since the current nonvolatile memory (NVM) has been approaching the scaling limits. Meanwhile, the undesired sneak current through neighboring unselected cells deteriorates the read margin and limits the maximum size of a crossbar array (i.e. read margin ~ 10%) -. And the selector devices have been used to resolve the sneak path current issue. However, the additional selector device in the so-called 1S-1R architecture (i.e. one selector-one resistor -Fig. 1 (a)) increases the cell size, process complexity, and cost. In this work, a nonlinear (NL) resistive switching (RS) in a multilevel lR-only selectorless RRAM cell has been demonstrated by using a graphite-based stacked RRAM device.