Modeling the technology impact on the design of a two-level multicomputer interconnection network

Jose L. Cruz-Rivera, Scott Wills, Thomas Gaylord, Elias Glytsis

Research output: Contribution to conferencePaperpeer-review

Abstract

The rapid advance of VLSI and packaging technologies has a significant impact on system architecture. In this paper, an analytical model is used to explore the design space of interconnection networks for a 4,096 node processing system incorporating multi-node chips packaged on a single MCM substrate. Possible designs are evaluated for a two-level interconnect with separate k-ary n-cube networks for intrachip and interchip communication. An analysis of the impact several architectural and technological parameters have on the optimal network implementation (based on average no-load latency) is presented.

Original languageEnglish (US)
Pages165-169
Number of pages5
StatePublished - 1996
Externally publishedYes
EventProceedings of the 1996 International Conference on Computer Design, ICCD'96 - Austin, TX, USA
Duration: Oct 7 1996Oct 9 1996

Conference

ConferenceProceedings of the 1996 International Conference on Computer Design, ICCD'96
CityAustin, TX, USA
Period10/7/9610/9/96

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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