TY - GEN
T1 - Model predictive control of three-phase four-leg neutral-point-clamped inverters
AU - Rodriguez, Jose
AU - Wu, Bin
AU - Rivera, Marco
AU - Wilson, Alan
AU - Yaramasu, Venkata
AU - Rojas, Christian
PY - 2010
Y1 - 2010
N2 - This paper presents a finite control set model predictive control strategy with a prediction horizon of one sample time to control the three-phase four-leg neutral-point-clamped (NPC) inverter with an output LC filter The four-leg NPC converter is developed to deliver power to the unbalanced/nonlinear three-phase loads and it can produce three output voltages independently with one additional leg. The proposed predictive method uses the discrete model of the inverter and load to predict the future load and capacitor voltage behavior for each valid switching state of the converter. The control method chooses a state which generates minimum error between the output voltages and their references and as well as between the capacitor voltages. The feasibility of the proposed predictive control scheme is verified by computer simulations, showing a good performance and the capacity to compensate disturbances while maintaining balancing of the dc-link capacitor voltages.
AB - This paper presents a finite control set model predictive control strategy with a prediction horizon of one sample time to control the three-phase four-leg neutral-point-clamped (NPC) inverter with an output LC filter The four-leg NPC converter is developed to deliver power to the unbalanced/nonlinear three-phase loads and it can produce three output voltages independently with one additional leg. The proposed predictive method uses the discrete model of the inverter and load to predict the future load and capacitor voltage behavior for each valid switching state of the converter. The control method chooses a state which generates minimum error between the output voltages and their references and as well as between the capacitor voltages. The feasibility of the proposed predictive control scheme is verified by computer simulations, showing a good performance and the capacity to compensate disturbances while maintaining balancing of the dc-link capacitor voltages.
UR - http://www.scopus.com/inward/record.url?scp=77956538416&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77956538416&partnerID=8YFLogxK
U2 - 10.1109/IPEC.2010.5543366
DO - 10.1109/IPEC.2010.5543366
M3 - Conference contribution
AN - SCOPUS:77956538416
SN - 9781424453955
T3 - 2010 International Power Electronics Conference - ECCE Asia -, IPEC 2010
SP - 3112
EP - 3116
BT - 2010 International Power Electronics Conference - ECCE Asia -, IPEC 2010
T2 - 2010 International Power Electronics Conference - ECCE Asia -, IPEC 2010
Y2 - 21 June 2010 through 24 June 2010
ER -