Low-Complexity Architecture of Finding First Four Minimum Values for Non-binary LDPC Decoders

Thang Xuan Pham, Phap Duong-Ngoc, Hanho Lee, Tuy Tan Nguyen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Looking for a set of minimum values is considering as an important part in reducing the computational complexity introduced by the conventional non-binary low-density parity-check (NB-LDPC) decoding algorithms. In which, looking for a set of four min-value has been using i n recent NB-LDPC decoders. In this paper, a low-complexity architecture is proposed for the first four minimum values finder. Experimental results confirmed that the proposed design is able to achieve a high flexibility in adapting to changing input sequence size while maintaining a low hardware complexity.

Original languageEnglish (US)
Title of host publicationProceedings - International SoC Design Conference 2022, ISOCC 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages105-106
Number of pages2
ISBN (Electronic)9781665459716
DOIs
StatePublished - 2022
Externally publishedYes
Event19th International System-on-Chip Design Conference, ISOCC 2022 - Gangneung-si, Korea, Republic of
Duration: Oct 19 2022Oct 22 2022

Publication series

NameProceedings - International SoC Design Conference 2022, ISOCC 2022

Conference

Conference19th International System-on-Chip Design Conference, ISOCC 2022
Country/TerritoryKorea, Republic of
CityGangneung-si
Period10/19/2210/22/22

Keywords

  • minimum values finder
  • Non-binary low-density parity-check (NB-LDPC)
  • pipelined architecture

ASJC Scopus subject areas

  • Artificial Intelligence
  • Computer Science Applications
  • Hardware and Architecture
  • Safety, Risk, Reliability and Quality

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