Implementing ultra-high-value floating tunable CMOS resistors

A. Tajalli; Y. Leblebici; E. J. Brauer

doi:10.1049/el:20082538

Implementing ultra-high-value floating tunable CMOS resistors

A. Tajalli, Y. Leblebici, E. J. Brauer

Informatics, Computing, and Cyber Systems, School of

Research output: Contribution to journal › Article › peer-review

108 Scopus citations

Abstract

A compact high-value floating resistor utilising PMOS devices in the subthreshold region is introduced. A test chip has been fabricated in 0.18m CMOS technology to verify the proposed concept. This technique has been applied to design a reconfigurable sixth-order very-low-cutoff-frequency MOSFET-C filter.

Original language	English (US)
Pages (from-to)	349-351
Number of pages	3
Journal	Electronics Letters
Volume	44
Issue number	5
DOIs	https://doi.org/10.1049/el:20082538
State	Published - 2008

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1049/el:20082538

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abstract = "A compact high-value floating resistor utilising PMOS devices in the subthreshold region is introduced. A test chip has been fabricated in 0.18m CMOS technology to verify the proposed concept. This technique has been applied to design a reconfigurable sixth-order very-low-cutoff-frequency MOSFET-C filter.",

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AU - Brauer, E. J.

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AB - A compact high-value floating resistor utilising PMOS devices in the subthreshold region is introduced. A test chip has been fabricated in 0.18m CMOS technology to verify the proposed concept. This technique has been applied to design a reconfigurable sixth-order very-low-cutoff-frequency MOSFET-C filter.

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Implementing ultra-high-value floating tunable CMOS resistors

Abstract

ASJC Scopus subject areas

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