High-density nano-pillar SiOx-based resistive switching memory using nano-sphere lithography to fabricate a one diode - One resistor (1D-1R) architecture

Y. F. Chang; L. Ji; Y. C. Chen; F. Zhou; T. M. Tsai; K. C. Chang; M. C. Chen; T. C. Chang; B. Fowler; E. T. Yu; J. C. Lee

doi:10.1109/VLSI-TSA.2014.6839674

High-density nano-pillar SiO_x-based resistive switching memory using nano-sphere lithography to fabricate a one diode - One resistor (1D-1R) architecture

Y. F. Chang, L. Ji, Y. C. Chen, F. Zhou, T. M. Tsai, K. C. Chang, M. C. Chen, T. C. Chang, B. Fowler, E. T. Yu, J. C. Lee

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

10 Scopus citations

Abstract

A highly compact, one diode - one resistor (1D-1R) nano-pillar device architecture has been demonstrated using nano-sphere lithography (NSL) to fabricate SiO_x-based resistive switching (RS) memory. The intrinsic SiO_x-based resistive switching element and Si-based PN diode are self-aligned on the epitaxial silicon wafer using NSL and a deep-Si-etch process without using conventional photolithography. The DC electrical performance, an AC pulse response in the 50 ns regime, capability for multi-bit operation, and high readout margin immunity for sneak path issue demonstrate good potential for high-speed nonvolatile memory (NVM). The NSL fabrication process is an efficient, economical approach to enable large-scale patterning of 1D-1R architectures while providing excellent NVM performance for future applications.

Original language	English (US)
Title of host publication	Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014
Publisher	IEEE Computer Society
ISBN (Print)	9781479922178
DOIs	https://doi.org/10.1109/VLSI-TSA.2014.6839674
State	Published - 2014
Externally published	Yes
Event	2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014 - Hsinchu, Taiwan, Province of China Duration: Apr 28 2014 → Apr 30 2014

Publication series

Name	Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014

Conference

Conference	2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014
Country/Territory	Taiwan, Province of China
City	Hsinchu
Period	4/28/14 → 4/30/14

Keywords

Nano-Sphere Lithography
Nano-pillar
ReRAM

ASJC Scopus subject areas

Hardware and Architecture
Computer Science Applications

Access to Document

10.1109/VLSI-TSA.2014.6839674

Cite this

Chang, Y. F., Ji, L., Chen, Y. C., Zhou, F., Tsai, T. M., Chang, K. C., Chen, M. C., Chang, T. C., Fowler, B., Yu, E. T., & Lee, J. C. (2014). High-density nano-pillar SiO_x-based resistive switching memory using nano-sphere lithography to fabricate a one diode - One resistor (1D-1R) architecture. In Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014 Article 6839674 (Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014). IEEE Computer Society. https://doi.org/10.1109/VLSI-TSA.2014.6839674

High-density nano-pillar SiO_x-based resistive switching memory using nano-sphere lithography to fabricate a one diode - One resistor (1D-1R) architecture. / Chang, Y. F.; Ji, L.; Chen, Y. C. et al.
Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014. IEEE Computer Society, 2014. 6839674 (Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Chang, YF, Ji, L, Chen, YC, Zhou, F, Tsai, TM, Chang, KC, Chen, MC, Chang, TC, Fowler, B, Yu, ET & Lee, JC 2014, High-density nano-pillar SiO_x-based resistive switching memory using nano-sphere lithography to fabricate a one diode - One resistor (1D-1R) architecture. in Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014., 6839674, Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014, IEEE Computer Society, 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014, Hsinchu, Taiwan, Province of China, 4/28/14. https://doi.org/10.1109/VLSI-TSA.2014.6839674

Chang YF, Ji L, Chen YC, Zhou F, Tsai TM, Chang KC et al. High-density nano-pillar SiO_x-based resistive switching memory using nano-sphere lithography to fabricate a one diode - One resistor (1D-1R) architecture. In Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014. IEEE Computer Society. 2014. 6839674. (Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014). doi: 10.1109/VLSI-TSA.2014.6839674

Chang, Y. F. ; Ji, L. ; Chen, Y. C. et al. / High-density nano-pillar SiO_x-based resistive switching memory using nano-sphere lithography to fabricate a one diode - One resistor (1D-1R) architecture. Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014. IEEE Computer Society, 2014. (Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014).

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abstract = "A highly compact, one diode - one resistor (1D-1R) nano-pillar device architecture has been demonstrated using nano-sphere lithography (NSL) to fabricate SiOx-based resistive switching (RS) memory. The intrinsic SiOx-based resistive switching element and Si-based PN diode are self-aligned on the epitaxial silicon wafer using NSL and a deep-Si-etch process without using conventional photolithography. The DC electrical performance, an AC pulse response in the 50 ns regime, capability for multi-bit operation, and high readout margin immunity for sneak path issue demonstrate good potential for high-speed nonvolatile memory (NVM). The NSL fabrication process is an efficient, economical approach to enable large-scale patterning of 1D-1R architectures while providing excellent NVM performance for future applications.",

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author = "Chang, {Y. F.} and L. Ji and Chen, {Y. C.} and F. Zhou and Tsai, {T. M.} and Chang, {K. C.} and Chen, {M. C.} and Chang, {T. C.} and B. Fowler and Yu, {E. T.} and Lee, {J. C.}",

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