This study proposes a generalised approach based on model predictive strategy for the current control, dc-link capacitor voltages balancing, switching frequency reduction and common-mode voltage mitigation in multilevel diode-clamped converters. A generalised discrete-time model of the converters is presented, where all the control objectives are formulated in terms of the switching states. The control goals are expressed as a cost function, and with the help of suitable weighting factors these goals are met simultaneously. The cost function minimisation is used as criteria for choosing the best switching state which would be applied to the converter during next sampling interval. The real-time digital control issues such as computational burden and delay compensation are also discussed. The feasibility of the proposed method is verified by simulations in three- to six-level converters, and by experiments in three- and four-level converters.
ASJC Scopus subject areas
- Electrical and Electronic Engineering