Bipolar circuits have high drive capability with low delay sensitivity to load while CMOS circuits have low power dissipation and high packing density. Combining both bipolar and MOS transistors on one monolithic substrate, Bipolar-CMOS (BiCMOS) circuits have high drive capability and low power dissipation at the expense of increased fabrication complexity. A major problem with conventional BiCMOS circuits is the reduced output swing due to the bipolar output transistors. This paper presents a novel BiCMOS circuit which uses bootstrapping to attain a full logic swing at the output. We present a design equation to estimate the size of the bootstrap capacitance as a function of power supply voltage. Simulations were performed using parameters from a 2.0 μm CMOS process with NPN option at supply voltages of 3.3 and 5 V. The circuit is a practical design which improves on the delay and power performance of previous bootstrapped BiCMOS inverters.
|Number of pages
|Proceedings of the IEEE Great Lakes Symposium on VLSI
|Published - Jan 1 1997
|Proceedings of the 1997 7th Great Lakes Symposium on VLSI - Urbana-Champaign, IL, USA
Duration: Mar 13 1997 → Mar 15 1997
ASJC Scopus subject areas
- Electrical and Electronic Engineering