Abstract
In this work, an engineered submicrometer-scale bilayer stacking in via-type one-time programmable (OTP) memory and self-rectified resistive switching memory [resistive random access memory (ReRAM)] is demonstrated. The current development has achieved that co-existing memory functionality (OTP and ReRAM) with mitigating scaling requirement (fuse voltage trending with via size scaling), low fabrication complexity [via-fuse vs. gate-dielectric anti-fuse (AF)], and match with the current metal fuse technology ( > 2 V). In addition, an electrode engineered has been proposed to realize low programming voltage ( ∼ 1.9 V) in via-fuse OTP featuring by metal-insulator-metal advanced back-end-of-line (BEOL) process with ruthenium materials. The impact of via-size, programming window, stacked structures, and integration capability has been extensively studied. Our results provide a pathfinding of high density, integration capability, low programming voltage, multifunctionality between programmable read-only memory (PROM), and resistive switching memory co-existing in future embedded applications.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 1042-1047 |
| Number of pages | 6 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 70 |
| Issue number | 3 |
| DOIs | |
| State | Published - Mar 1 2023 |
Keywords
- Nonvolatile memory (NVM)
- programmable read-only memory (PROM)
- self-rectified memory
- sneak path
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering